McVCO CIRCUIT DESCRIPTION This description is intended for use with the schematic diagrams for McVCO, a microcontroller based mimic of the voltage controlled oscillator used in the analog telemetry of seismic signals. The current version is MCFM05. INPUT/OUTPUT AND DC SUPPLY (schematic sheet 1) Drawn in the lower left of the schematic diagram are the solder pin connections for power and the output carrier frequency. They are labeled "SW+", "CAR+", "B+in", "CAR-", and "GND". "B+in" is the connection to the positive side of a 12VDC battery or power supply. "GND" is the negative connection to the supply and is ground, the 0 volt reference point. The schematic sometimes shows this connection with the ground symbol or indicates it with the "0V" label. The positive side of the supply continues through the polarity protection diode, D1, to the power switching circuits formed with U14, Q1, Q2, and Q3. U14 is an op-amp with an internal voltage reference and is connected as a comparator. The reference at pin 2 is compared with a fraction of the positive supply at pin 3 and the output at pin 6 is at the positive supply voltage (+V) or at ground. R35 provides positive feedback for hysteresis of 1 volt, so that the circuit switches ON (+V) with a "B+in" voltage of about 11 VDC and OFF (0V) when "B+in" is about 10 VDC. The primary reason for the switch is to provide a clean reset for the microcontroller. In some circumstances, solar power systems can come up to the operating voltage gradually and fail to reset the microcontroller. This causes unpreditable behavior including the production of interfering output tones. A secondary use of the switch is to power an external load. U14's output splits going to the external load switch formed by Q2, Q3 and to the voltage follower Q1. The external load switch is brought out on "SW+". Care must be used when connecting external loads so that IR drops in the wiring from the battery do not overcome the hysteresis of U14 or the switch will oscillate. The RC circuit in Q2's gate provides a delay in switching action while external loads stabilize. The regulated power supply recieves its input voltage from the emitter of Q1. This is approximately the output voltage of the U14 comparator until it exceeds the 15 VDC zener voltage of D2. Then the emitter of Q1 is clamped at 14.4 VDC. The zener clamp together with the transient voltage suppressor, VS4, provide the overvoltage protection for the instrument. When 12 volt solar panels are unloaded by batteries, outputs greater than 20 VDC at reduced current are possible. VS4 clamps unloaded solar panels to about 20 VDC and can shunt 100 mA indefinitely. VS4 together with VS1, VS2, VS3, VS5, VS6, and VS7 provide transient voltage protection on the instrument's inputs and outputs. U12 is a +5 VDC regulator with an on chip comparator. The compar- ator is used to provide a reset pulse for the microcontroller. This reset is initiated by shorting across R40 on the pins pro- vided. U13 is a switching inverter which converts the +5 VDC from U12 to the -5 VDC supply. These two supplies power the remaining circuits in the instrument. The modulated audio carrier frequency output is brought out on the pins labeled "CAR+" and "CAR-" at up to 4vpp into 600 ohms via transformer, T1. C35 blocks external DC sources, R35 raises the primary impedance for a 600 ohm impedance match, and with C21 isolates the output amplifier section of the quad op-amp, U3. The carrier output amp is a summing inverter whose gain varies from 2 to 1 with the adjustment of the Output Level pot, P7. The inputs to the summing amp are from the two on board waveform generator outputs, f1 and f2 (see sheet 3), and from an external audio carrier, fin, which may be connected through J2. J1 and J2 are modular jacks, shown on the left edge of sheet 1. J1's connections are similiar to the solder pin connections with the exception of "B+out" which is taken from the cathode of D1, the input polarity protection diode. J2 provides unregulated power, ground, and a carrier input connection, fin. J1 may be used to connect the instrument to a radio transmitter. J2 connects and powers other telemetered instruments. By using J1 and J2 together, a 3 component seismic station can be wired by chaining three McVCOs. Above J2 on the diagram is shown the seismometer input connection to the S and T Header. The seismometer coil leads are wired to "I+" and "I-" with the polarity indicated. The seismometer cable shield can be wired to the ground connection provided. From these solder pins the input goes to an 8 pin DIP socket where header mounted S and T resistors can be plugged in. The T resistor is split into two equal t1 and t2 components for the sake of pre- serving input common mode noise rejection. If T resistors are not used or are not located at the header, then shorting jumpers must replace t1 and t2 to complete the input connection. R7 connects the seismometer to a microcontroller I/O pin for pulse testing. From the header socket, connections are made to the preamplifier shown on sheet 2 of the schematic diagram. At the top of sheet 1 are shown the components provided to support the optional second channel. An example of second channel use is shown immediately below them. Here the components are used as a fixed low gain interface from the filter (sheet 2) to the second ADC channel (sheet 3) so that high and low gain measurements of the same seismic signal are made and telemetered. The seismic signal is inverted by U3 at pin 1 and then level shifted by U15 to a 2.5 VDC bias appropriate for the 0 to 5 volt ADC. R48 is selected to attenuate the 10 vpp swing at U3 pin 1 and to calibrate the overall gain of the channel. The 1.8M value shown gives the same frequency deviation as a USGS J512 with a deviation sensitivity of 115Hz/4.05V operated at a gain of 40dB (attenuation=50dB). PREAMPLIFIER/FILTER (schematic sheet 2) The signal from the S and T header (sheet 1) is applied to the the instrumentation amplifier, U1, through the input circuit at In- and In+. Since the seismometer coil is unreferenced to ground (floats), R1 appears in series with R2 across the coil to give the standard 10K ohm input impedance. R3 and R4 are current limiting resistors which protect U1. Connections are shown for a rely, RL1, which is not used in this application. R5 and R6 set the gain of U1 and are not used in this appplic- ation, so U1 has its maximum gain of 100 (40dB). A two stage filter follows the input instrumentation amplifier. It is formed with 2 op-amps of the quad amplifier, U2. The 4 pole filter has a 30Hz low pass Butterworth response and is unity gain. Output from the filter at pin 8 of U2 is available for low gain second channel use and is the input to the variable gain amplifier. The variable gain amplifier, shown at the bottom of sheet 2, is formed from the DAC, U4, and one section of U3, a quad op-amp. U4 is a 12 bit multiplying DAC and is used as the feedback element in the inverting amplifier made with U3. Through the serial inter- face lines "Data", "Clock" and "Gain" the microcontroller (sheet 3) sets the gain of this stage to give the instrument a selectable calibrated response. The Null control, P1 is used to zero the variable gain amplifier at TP1 when the instrument is in shutdown mode (see Setup Procedure in the Operation Manual). The zero referenced output has a swing of almost 10 vpp which must be re- duced for a 0 to 5 volt analog to digital conversion. The Cal pot P2, provides the required attenuation and adjusts the instrument calibration (see Calibration Check in the Operation Manual). TP2 is the monitor test point where the amplified seismic signal can be safely viewed. The bipolar output at TP2 must be level shifted to a 2.5 VDC bias for the ADC. This is done in the op-amp section of U5, where the signal is summed with a DC level from the Shift 1 pot, P3. At TP3, the seismic signal spans a 0 to 5 volt range refer- enced to 2.5 VDC as required by the analog to digital conversion. The output of U5 on pin 6 connects to the first ADC channel on U6 pin 2 (CH0), see sheet 3. The microcontroller adjusts the offset of the preamplifier as well as its gain. Another 12 bit DAC, U7, is interfaced to the controller through the serial interface lines "Data", "Clock" and "Offset" (see the center of sheet 2). The reference section of U5 produces 200 mVDC which is divided down to 50 mVDC by R19 and R20 for the reference input of the DAC, U7 pin 1. The DAC outputs a current at pin 3 which is a product of the DAC count and the voltage on the reference pin. At pin 14 of U2 the DAC current has been changed to a voltage which is summed against the 50 mVDC reference so that at the output of U2 on pin 1, the DAC count produces a proportional voltage between + and - 50 mVDC. This voltage is applied to the ground reference terminal of the instrumentation amp, pin 1 U1, and is used by the microcontroller to adjust the DC level at the preamplifier output, U5 pin 6. MICROCONTROLLER (schematic sheet 3) The clock frequencies required by the microcontroller, U9, are derived from the 4.096 MHz crystal oscillator shown at the bottom of sheet 3. The buffered output of the oscillator, U10 pin 10, drives a divider chain, U11, which produces 1.024 MHz at pin 7 for the microcontroller clock, U9 pin 27, and 1.0 KHz at pin 1 for the real time clock input at U9 pin 1. A 512 KHz clock is produced by the divider on pin 6 for the waveform generator clock inputs, pin 8 on U8 and U16. Most of the microcontroller's activity is transmitted through the serial interface formed with its I/O pins. Common lines for serial clock, U9 pin 13, and serial data, U9 pin 14, connect the preamplifier gain and offset DACs, the ADC, and the f1 and f2 waveform generators. Individual chip select lines address each IC as shown. The DIP switch, DS1 is read on microcontroller I/O pins 17 to 25. Switch 1 is connected to pin 25 with switch 9 on pin 17. The table on the right side of sheet 3 shows how gain and fre- quency are selected by the switches. The switches are "active low", an ON switch pulls the line low which the microcontroller interprets as a logic 0. The invalid condition of f1 and f2 selected for the same frequency, results in a shutdown of the instrument. This condition is used for adjusting the preamp (see Operations Manual, Setup Proceedure) but must be avoided when the instrument is in use, even if the second channel fre- quency, f2 is not used. DS1 is read by the microcontroller only after a power cycle or reset. The four remaining I/O lines are used for diverse purposes. The line on pin 6 connects to the coil of the preamplifier input relay, RL1 which is not used in this application. Pin 7 allows a pulse to be applied to the seismometer through R7 (sheet 1) as part of a programmed periodic test. The I/O lines on pins 15 and 16 are used as program branch flags in some ver- sions of the microcontroller program where 5 volts on pin 15 enables the periodic test routine and 5 volts on pin 16 en- ables two channel operation. The analog to digital converter, U6, responds to requests from the microcontroller for a conversion of the input voltage on either of the two input channels at pin 2 or 3. After the con- version is transfered to the microcontroller, the ADC idles while the controller changes the measurement into a code and sends it to the f1 or f2 waveform generator, U8 or U16. The generator uses the code to synthesize the instantaneous output frequency corresponding to the ADC measurement and the selected carrier frequency. The cycle begins again with a new A to D conversion and repeats approximately 660 times per second for a single channel and about half that rate for two channel oper- ation. The f1 Level pot, P5, and the f2 Level pot, P6, adjust the output amplitudes of the waveform generators, U8 and U16, at TP5 and TP6. The modulated carriers at these test points are connected to the output summing amp, see sheet 1. During the measurement cycle the microcontroller's real time clock is examined. At the correct interval an adjustment is made to the offset DAC (sheet 2) and the 24 hr timer registers are incremented and checked for "time out". If selected, at "time out" the programed test routine is entered. At the end of the test routine the measurement cycle begins again. At power up or after a reset, the instrument goes into an auto- zero mode. At this time, f1 and f2 are set to their carrier center frequencies while offset is removed from the preamplifier output by adjusting the count on the offset DAC. The autozero lasts for 10 seconds before the measurement cycle starts. Pat McChesney UW Geophysics January, 1996